The deployment of through-silicon stacking (TSS) products may affect which failure analysis methods are considered more desirable in some instances. In an example TSS product, a memory die is stacked directly on top of a logic die and connected electrically by vias that pass through the logic die directly to the memory die. For some types of failure analysis it is desirable to measure the voltage level on one or more of these vias, either to obtain an accurate analog measurement of voltage drop, or to measure timing of signals in the vias.
Some conventional systems employ light-emitting circuits to perform failure analysis. However, such conventional systems do not contemplate the case in which two dies (e.g., memory and logic) are tightly coupled in a TSS configuration. The tightly-packed arrangement of the dies in a TSS structure can make it difficult or impossible to observe the light from a light-emitting circuit. In general, the problem of probing TSS structures for failure analysis has not been directly addressed in the context of light-emitting circuits because TSS is a new method of assembling and packaging devices.